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LTC3606B 1 3606bf typical application description 800ma synchronous step-down dc/dc with average input current limit the ltc ? 3606b is an 800ma monolithic synchronous buck regulator using a constant frequency current mode architecture. the input supply voltage range is 2.5v to 5.5v, making it ideal for li-ion and usb powered applications. 100% duty cycle capability provides low dropout operation, extending the run time in battery-operated systems. low output voltages are supported with the 0.6v feedback reference voltage. the LTC3606B can supply 800ma output current. the LTC3606Bs programmable average input current limit is ideal for usb applications and for point-of-load power supplies because the LTC3606Bs limited input current will still allow its output to deliver high peak load currents without collapsing the input supply. the operating frequency is internally set at 2.25mhz allowing the use of small surface mount inductors. internal soft-start reduces in-rush current during start-up. the LTC3606B is available in an 8-lead 3mm 3mm dfn package. monolithic buck regulator with input current limit features applications n programmable average input current limit: 5% accuracy n step-down output: up to 96% ef? ciency n low noise pulse-skipping operation at light loads n input voltage range: 2.5v to 5.5v n output voltage range: 0.6v to 5v n 2.25mhz constant-frequency operation n power good output voltage monitor n low dropout operation: 100% duty cycle n internal soft-start n current mode operation for excellent line and load transient response n 2% output voltage accuracy n short-circuit protected n shutdown current 1a n available in small thermally enhanced 8-lead 3mm 3mm dfn package n high peak load current applications n usb powered devices n supercapacitor charging n radio transmitters and other handheld devices gsm pulse load pgood c in 10f v in 3.4v to 5.5v 499k 255k 1.5h 2.2mf s 2 supercap 116k + 1000pf i lim = 475ma v out 3.4v at 800ma 1210k v in LTC3606B v fb sw rlim pgood run gnd 3606b ta01 l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s.patents, including 5481178, 6127815, 6304066, 6498466, 6580258, 6611131. 1ms/div v in = 5v, 500ma compliant i load = 0a to 2.2a 3606b ta01b v out 200mv/div i out 500ma/div i in 500ma/div v in ac-coupled 1v/div
LTC3606B 2 3606bf absolute maximum ratings input supply voltage (v in ) ........................... C0.3v to 6v v fb ................................................... C0.3v to v in + 0.3v run, rlim ....................................... C0.3v to v in + 0.3v sw ................................................... C0.3v to v in + 0.3v pgood............................................. C0.3v to v in + 0.3v p-channel sw source current (dc) (note 2) ..............1a n-channel sw source current (dc) (note 2) .............1a peak sw source and sink current (note 2) ............. 2.7a operating junction temperature range (notes 3, 6, 8) ........................................ C40c to 125c storage temperature range .................. C65c to 125c re? ow peak body temperature ............................ 260c (note 1) top view dd package 8-lead (3mm s 3mm) plastic dfn 5 6 7 8 9 gnd 4 3 2 1 v fb run pgood v in gnd rlim gnd sw t jmax = 125c, ja = 40c/w exposed pad (pin 9) is gnd, must be soldered to pcb pin configuration order information lead free finish tape and reel part marking* package description temperature range LTC3606Bedd#pbf LTC3606Bedd#trpbf lfmb 8-lead (3mm 3mm) plastic dfn C40c to 85c LTC3606Bidd#pbf LTC3606Bidd#trpbf lfmb 8-lead (3mm 3mm) plastic dfn C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
LTC3606B 3 3606bf electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: guaranteed by long term current density limitations. note 3: the LTC3606Be is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC3606Bi is guaranteed to meet speci? ed performance over the full C40c to 125c operating junction temperature range. note 4: dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. the l denotes the speci? cations which apply over the full operating junction temperature range, otherwise speci? cations are at t a = 25c, v in = 5v, unless otherwise noted. note 5: the switch on-resistance is guaranteed by correlation to wafer level measurements. note 6: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. note 7: the converter is tested in a proprietary test mode that connects the output of the error ampli? er to the sw pin, which is connected to an external servo loop. note 8: t j is calculated from the ambient temperature t a and the power dissipation as follows: t j = t a + (p d )( ja c/w) symbol parameter conditions min typ max units v in v in operating voltage range l 2.5 5.5 v v uv v in undervoltage lockout v in low to high l 2.1 2.5 v i fb feedback pin input current l 30 na v fbreg feedback voltage LTC3606Be, C40c < t j < 85c LTC3606Bi, C40c < t j < 125c l l 0.588 0.582 0.600 0.600 0.612 0.618 v v v linereg v fb line regulation v in = 2.5v to 5.5v (note 7) 0.01 0.25 %/v v loadreg v fb load regulation i load = 0ma to 800ma (note 7) 0.5 % i s supply current active mode (note 4) shutdown v fb = 0.95 v fbreg v run = 0v, v in = 5.5v 420 650 1 a a f osc oscillator frequency v fb = v fbreg l 1.8 2.25 2.7 mhz i lim(peak) peak switch current limit v in = 5v, v fb < v fbreg , duty cycle <35% 1800 2400 ma i inlim input average current limit rlim = 116k rlim = 116k, LTC3606Be rlim = 116k, LTC3606Bi l l 450 437 427 475 475 475 500 513 523 ma ma ma r ds(on) main switch on-resistance synchronous switch on-resistance v in = 5v, i sw = 100ma v in = 5v, i sw = 100ma 0.27 0.25 i sw(lkg) switch leakage current v in = 5v, v run = 0v 0.01 1 a t softstart soft-start time v fb from 0.06v to 0.54v 0.3 0.95 1.3 ms v run run threshold high l 0.4 1 1.2 v i run run leakage current l 0.01 1 a pgood power good threshold entering window v fb ramping up v fb ramping down leaving window v fb ramping up v fb ramping down C5 5 C7 7 9 C9 11 C11 % % % % pgood blanking power good blanking time pgood rising and falling, v in = 5v 90 s r pgood power good pull-down on-resistance 8 15 30 i pgood pgood leakage current v pgood = 5v 1 a
LTC3606B 4 3606bf typical performance characteristics t a = 25c, v in = 5v, unless otherwise noted. switch leakage vs input voltage pulse-skipping mode operation ef? ciency vs input voltage regulated voltage vs temperature oscillator frequency vs temperature supply current vs temperature switch on-resistance vs input voltage ef? ciency vs load current v in = 5v v out = 3.3v i load = 5ma 3606b g01 sw 2v/div i l 100ma/div v out 50mv/div ac- coupled 5s/div v in (v) v out = 3.3v 3.5 efficiency (%) 100 90 40 20 50 60 70 80 30 10 0 4.5 3606b g03 5.5 45 i out = 10ma i out = 1ma i out = 0.1ma i out = 100ma i out = 400ma i out = 800ma temperature (c) C50 v fb error (%) 1.5 1.0 C1.0 C0.5 0 0.5 C1.5 75 50 25 0 3606b g04 125 C25 100 temperature (c) C50 frequency (mhz) 2.5 2.4 1.9 2.0 2.2 2.1 2.3 1.8 75 50 25 0 3606b g05 125 C25 100 v in = 2.7v v in = 3.6v v in = 4.2v v in = 5v temperature (c) C50 supply current (a) 550 500 250 300 400 350 450 200 75 50 25 0 3606b g02 125 C25 100 v in = 2.7v v in = 5.5v run = v in i load = 0a v in (v) 2.5 leakage current (pa) 1000 800 400 200 600 0 5 4.5 4 3.5 3606b g06 5.5 3 main switch synchronous switch v in (v) 2.5 r ds(on) (m) 600 500 300 400 200 5 4.5 4 3.5 3606b g07 5.5 3 main switch synchronous switch temperature (c) C50 C25 main pfet r ds(on) () synchronous nfet r ds(on) () 0.5 0.4 0.2 0.1 0 0.3 C0.1 0.7 0.6 0.4 0.3 0.2 0.5 0.1 100 75 50 25 3606b g09 125 0 main switch synchronous switch v in = 2.7v v in = 3.6v v in = 5v switch on-resistance vs temperature output current (a) efficiency (%) 3606b g11 100 90 80 70 60 50 40 30 20 10 0 0.0001 0.1 1 0.01 0.001 v out = 3.3v v in = 3.6v v in = 4.2v v in = 5v
LTC3606B 5 3606bf typical performance characteristics t a = 25c, v in = 5v, unless otherwise noted. ef? ciency vs load current load regulation line regulation start-up from shutdown start-up from shutdown output current (a) efficiency (%) 3606b g13 100 90 80 70 60 50 40 30 20 10 0 0.0001 0.1 1 0.01 0.001 v out = 1.2v v in = 2.7v v in = 3.6v v in = 4.2v v in = 5v load current (ma) v out error (%) 3606b g15 3.0 2.5 2.0 1.5 1.0 0.5 0 C0.5 C1.0 0 300 400 500 600 700 800 200 100 v out = 1.8v v out = 2.5v v out = 3.3v v in (v) v out error (%) 3606b g16 0.6 0.4 0.2 0 C0.2 C0.4 C0.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v out = 1.8v i load = 100ma v in = 5v, v out = 3.3v r load = 7 c load = 4.7f 3606b g17 run 2v/div i l 250ma/div v out 1v/div 200s/div v in = 5v, v out = 3.4v r l = no load, c l = 4.4mf c lim = 2200pf, i lim = 500ma 3606b g18 run 2v/div i in 500ma/div v out 2v/div r lim 1v/div 2ms/div average input current limit vs temperature load step load step temperature (c) C50 C8 i inlim error (%) C4 C2 C6 0 6 4 2 8 75 100 50 25 0 C25 3606b g19 125 v in = 5v i lim = 475ma v in = 5v, v out = 3.3v i load = 0a to 800ma c out = 100f, c f = 20pf 20s/div 3606b g20 i load 1a/div i l 1a/div v out 200mv/div ac-coupled v in = 5v, v out = 1.8v i load = 80ma to 800ma c out = 100f, c f = 20pf 20s/div 3606b g21 i load 1a/div i l 1a/div v out 200mv/div ac-coupled v rlim vs input current i in (ma) v rlim (v) 3606b g18b 1.2 1.0 0.8 0.6 0.4 0.2 0 0 100 200 300 400 500 600 i lim = 475ma r lim = 116k
LTC3606B 6 3606bf gnd (pins 1, 3, exposed pad pin 9): ground. connect to the (C) terminal of c out , and the (C) terminal of c in . the exposed pad must be soldered to pcb. rlim (pin 2): average input current limit program pin. place a resistor and capacitor in parallel from this pin to ground. sw (pin 4): regulator switch node connection to the inductor. this pin swings from v in to gnd. v in (pin 5): main power supply. must be closely de- coupled to gnd. pgood (pin 6): open-drain logic output. pgood is pulled to ground if the voltage on the v fb pin is not within power good threshold. run (pin 7): regulator enable. forcing this pin to v in enables regulator, while forcing it to gnd causes regulator to shut down. v fb (pin 8): regulator output feedback. receives the feedback voltage from the external resistive divider across the regulator output. nominal voltage for this pin is 0.6v. pin functions
LTC3606B 7 3606bf functional diagram 0.6v ref osc osc 3606b fd run rlim + C 1v C C + C + ea C + v sleep i th switching logic and blanking circuit s r q q rs latch C + i comp i rcmp anti shoot- thru slope comp sleep shutdown sw 8 v fb 6 pgood 4 v in 5 gnd 9 0.6v min clamp soft-start v fb 0.546v 0.654v + C + C C + i comp 7 2
LTC3606B 8 3606bf operation the LTC3606B uses a constant-frequency, current mode architecture. the operating frequency is set at 2.25mhz. the output voltage is set by an external resistor divider returned to the v fb pins. an error ampli? er compares the divided output voltage with a reference voltage of 0.6v and regulates the peak inductor current accordingly. the LTC3606B continuously monitors the input current via the voltage drop across the r ds(on) of the internal p-channel mosfet. when the input current exceeds the programmed input current limit set by an external resistor, r lim , the regulators input current is limited. the regulator output voltage will drop to meet output current demand and to maintain constant input current. main control loop during normal operation, the top power switch (p-channel mosfet) is turned on at the beginning of a clock cycle when the v fb voltage is below the reference voltage. the current into the inductor and the load increases until the peak inductor current (controlled by i th ) is reached. the rs latch turns off the synchronous switch and energy stored in the inductor is discharged through the bottom switch (n-channel mosfet) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the i rcmp comparator). the peak inductor current is controlled by the internally compensated i th voltage, which is the output of the error ampli? er. this ampli? er regulates the v fb pin to the internal 0.6v reference by adjusting the peak inductor current accordingly. when the input current limit is engaged, the peak inductor current will be lowered, which then reduces the switching duty cycle and v out . this allows the input voltage to stay regulated when its programmed current output capability is met. light load operation the LTC3606B will automatically transition from continuous operation to the pulse-skipping operation when the load current is low. the inductor current is not ? xed during the pulse-skipping mode which allows the LTC3606B to switch at constant-frequency down to very low currents, where it will begin skipping pulses to maintain output regulation. this mode of operation exhibits low output ripple as well as low audio noise and reduced rf interference while providing reasonable low current ef? ciency. dropout operation when the input supply voltage decreases toward the output voltage the duty cycle increases to 100%, which is the dropout condition. in dropout, the pmos switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal p-channel mosfet and the inductor. an important design consideration is that the r ds(on) of the p-channel switch increases with decreasing input supply voltage (see the typical performance characteristics section). therefore, the user should calculate the worst- case power dissipation when the LTC3606B is used at 100% duty cycle with low input voltage (see thermal considerations in the applications information section). soft-start in order to minimize the inrush current on the input bypass capacitor, the LTC3606B slowly ramps up the output voltage during start-up. whenever the run pin is pulled high, the corresponding output will ramp from zero to full-scale over a time period of approximately 750s. this prevents the LTC3606B from having to quickly charge the output capacitor and thus supplying an excessive amount of instantaneous current. when the output is loaded heavily, for example, with millifarad of capacitance, it may take longer than 750s to charge the output to regulation. if the output is still low after the soft-start time, the LTC3606B will try to quickly charge the output capacitor. in this case, the input current limit (after it engages) can prevent excessive amount of instantaneous current that is required to quickly charge the output. see the start-up from shutdown curve (c l = 4.4mf)in the typical performance characteristics section. after input current limit is engaged, the output slowly ramps up to regulation while limited by its 500ma of input current.
LTC3606B 9 3606bf operation short-circuit protection when either regulator output is shorted to ground, the corresponding internal n-channel switch is forced on for a longer time period for each cycle in order to allow the inductor to discharge, thus preventing inductor current runaway. this technique has the effect of decreasing switching frequency. once the short is removed, normal operation resumes and the regulator output will return to its nominal voltage. input current limit internal current sense circuitry measures the inductor current through the voltage drop across the power pfet switch and forces the same voltage across the small sense pfet. the voltage across the small sense pfet generates a current representing 1/55,000th of the inductor current during the on-cycle. the current out of rlim pin is the representation of the inductor current, which can be expressed in the following equation. i rlim = i out ? d1 ? k1 where d1 = v out1 /v in is the duty cycle. k1 is the ratio r ds(on) (power pfet)/r ds(on) (sense pfet). the ratio of the power pfet to the sense pfet is trimmed to within 2%. given that both pfets are carefully laid out and matched, their temperature and voltage coef? cient effects will be similar and their terms be canceled out in the equation. in that case, the constant k1 will only be dependent on area scaling, which is trimmed to within 2%. thus, the i rlim current will track the input current very well over varying temperature and v in . the rlim pin can be grounded to disable input current limit function. programming input current limit selection of one external r lim resistor will program the input current limit. the current limit can be programmed from 200ma up to i peak current. as the input current increases, r lim voltage will follow. when r lim reaches the internal comparator threshold of 1v, the power pfet on-time will be shortened, thereby, limiting the input current. use the following equation to select the r lim resistance that corresponds to the input current limit. r lim = 55k / i dc i dc is the input current (at v in ) to be limited. the following are some r lim values with the corresponding current limit. r lim i dc 91.6k 600ma 110k 500ma 137.5k 400ma selection of c lim capacitance since i rlim current is a function of the inductor current, its dependency on the duty cycle cannot be ignored. thus, a c lim capacitor is needed to integrate the i rlim current and smooth out transient currents. the LTC3606B is stable with any size capacitance >100pf at the rlim pin. each application input current limit will call for different c lim value to optimize its response time. using a large c lim capacitor requires longer time for the rlim pin voltage to charge. for example, consider the application 500ma input current limit, 5v input and 1a, 2.5v output with a 50% duty cycle. when an instantaneous 1a output pulse is applied, the current out of the rlim pin becomes 1a/55k = 18.2a during the 50% on-time or 9.1a full duty cycle. with a c lim capacitor of 1f, r lim of 116k, and using i = cdv/dt, it will take 110ms for c lim to charge from 0v to 1v. this is the time after which the LTC3606B will start input current limiting. any current within this time must be considered in each application to determine if it is tolerable.
LTC3606B 10 3606bf figure 1a shows v in (i in ) current below input current limit with a c lim capacitor of 0.1f. when the load pulse is applied, under the speci? ed condition, i lim current is 1.1a/55k ? 0.66 = 13.2a, where 0.66 is the duty cycle. it will take a little more than 7.5ms to charge the c lim capacitor from 0v to 1v, after which the LTC3606B begins to limit input current. the i in current is not limited during this 7.5ms time and is more than 725ma. this current transient may cause the input supply to temporarily droop if the supply current compliance is exceeded, but recovers after the input current limit engages. the output will continue to deliver the required current load while the output voltage droops to allow the input voltage to remain regulated during input current limit. for applications with short load pulse duration, a smaller c lim capacitor may be the better choice as in the example shown in figure 1b. in this example, a 577s, 0a to 2a output pulse is applied once every 4.7ms. a c lim capacitor of 2.2nf requires 92s for v rlim to charge from 0v to 1v. during this 92s, the input current limit is not yet engaged and the output must deliver the required current load. this may cause the input voltage to droop if the current compliance is exceeded. depending on how long this time is, the v in supply decoupling capacitor can provide some of this current before v in droops too much. in applications with a bigger v in supply decoupling capacitor and where v in supply is allow to droop closer to dropout, the c lim capacitor can be increased slightly. this will delay the start of input current limit and arti? cially regulated v out before input current limit is engaged. in this case, within the 577s load pulse, the v out voltage will stay arti? cially regulated for 92s out of the total 577s before the input current limit activates. this approach may be used if a faster recovery on the output is desired. selecting a very small c lim will speed up response time but it can put the device within threshold of interfering with normal operation and input current limit in every few switching cycles. this may be undesirable in terms of noise. use 2rc >> 100/clock frequency (2.25mhz) as a starting point, r being r lim , c being c lim . operation figure 1a. input current limit within 100ms load pulses 50ms/div v in = 5v, 500ma compliant r lim = 116k, c lim = 0.1f i load = 0a to 1.1a, c out = 2.2mf, v out = 3.3v i lim = 475ma 3606b f01a v out 2v/div v rlim 1v/div i l 1a/div i in 500ma/div 1ms/div v in = 5v, 500ma compliant r lim = 116k, c lim = 2200pf i load = 0a to 2a, c out = 2.2mf, v out = 3.3v i lim = 475ma 3606b f01b v out 200mv/div i out 500ma/div i in 500ma/div v in ac-coupled 1v/div figure 1b. input current limit within 577s, 2a repeating load pulses
LTC3606B 11 3606bf a general LTC3606B application circuit is shown in figure 2. external component selection is driven by the load require- ment, and begins with the selection of the inductor l. once the inductor is chosen, c in and c out can be selected. inductor selection although the inductor does not in? uence the operat- ing frequency, the inductor value has a direct effect on ripple current. the inductor ripple current i l decreases with higher inductance and increases with higher v in or v out : i l = v out f o ?l ?1 ? v out v in ? ? ? ? ? ? (1) accepting larger values of i l allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. a reasonable starting point for setting ripple current is 40% of the maximum output load current. so, for a 800ma regulator, i l = 320ma (40% of 800ma). the inductor value will also have an effect on burst mode operation. the transition to low current operation begins when the peak inductor current falls below a level set by the internal burst clamp. lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. this causes a dip in ef? ciency in the upper range of low current operation. furthermore, lower inductance values will cause the bursts to occur with increased frequency. inductor core selection different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. the choice of which style inductor to use often depends more on the price versus size requirements, and any radiated ? eld/emi requirements, than on what the LTC3606B requires to operate. table 1 shows some typical surface mount inductors that work well in LTC3606B applications. table 1. representative surface mount inductors manu- facturer part number value max dc current dcr height coilcraft lps4012-152ml lps4012-222ml lps4012-332ml lps4012-472ml lps4018-222ml lps4018-332ml lps4018-472ml 1.5h 2.2h 3.3h 4.7h 2.2h 3.3h 4.7h 2200ma 1750ma 1450ma 1450ma 2300ma 2000ma 1800ma 0.070 0.100 0.100 0.170 0.070 0.080 0.125 1.2mm 1.2mm 1.2mm 1.2mm 1.8mm 1.8mm 1.8mm fdk fdkmipf2520d fdkmipf2520d fdkmipf2520d 4.7h 3.3h 2.2h 1100ma 1200ma 1300ma 0.11 0.1 0.08 1mm 1mm 1mm murata lqh32cn4r7m23 4.7h 450ma 0.2 2mm panasonic elt5kt4r7m 4.7h 950ma 0.2 1.2mm sumida cdrh2d18/ld cdh38d11snp- 3r3m cdh38d11snp- 2r2m 4.7h 3.3h 2.2h 630ma 1560ma 1900ma 0.086 0.115 0.082 2mm 1.2mm 1.2mm taiyo yuden cb2016t2r2m cb2012t2r2m cb2016t3r3m nr30102r2m nr30104r7m 2.2h 2.2h 3.3h 2.2h 4.7h 510ma 530ma 410ma 1100ma 750ma 0.13 0.33 0.27 0.1 0.19 1.6mm 1.25mm 1.6mm 1mm 1mm tdk vlf3010at4r7- mr70 vlf3010at3r3- mr87 vlf3010at2r2- m1r0 vlf4012at-2r2 m1r5 vlf5012st-3r3 m1r7 vlf5014st-2r2 m2r3 4.7h 3.3h 2.2h 2.2h 3.3h 2.2h 700ma 870ma 1000ma 1500ma 1700ma 2300ma 0.28 0.17 0.12 0.076 0.095 0.059 1mm 1mm 1mm 1.2mm 1.2mm 1.4mm pgood c in r pgd r lim c lim v in 2.5v to 5.5v r1 l1 v out c out c f r2 v in LTC3606B v fb sw rlim pgood run gnd 3606b f02 figure 2. LTC3606B general schematic applications information
LTC3606B 12 3606bf applications information input capacitor (c in ) selection in continuous mode, the input current of the converter is a square wave with a duty cycle of approximately v out /v in . to prevent large voltage transients, a low equivalent series resistance (esr) input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: i rms i max v out (v in ? v out ) v in where the maximum average output current i max equals the peak current minus half the peak-to-peak ripple current, i max = i lim C i l /2. this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case is commonly used to design because even signi? cant deviations do not offer much relief. note that capacitor manufacturers ripple current ratings are often based on only 2000 hours lifetime. this makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet the size or height requirements of the design. an additional 0.1f to 1f ceramic capacitor is also recommended on v in for high frequency decoupling when not using an all-ceramic capacitor solution. output capacitor (c out ) selection the selection of c out is driven by the required effective series resistance (esr). typically, once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. the output ripple v out is determined by: v out ? i l esr + 1 8f o c out ? ? ? ? ? ? where f o = operating frequency, c out = output capacitance and i l = ripple current in the inductor. for a ? xed output voltage, the output ripple is highest at maximum input voltage since i l increases with input voltage. if tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum. these are specially constructed and tested for low esr so they give the lowest esr for a given volume. other capacitor types include sanyo poscap , kemet t510 and t495 series, and sprague 593d and 595d series. consult the manufacturer for other speci? c recommendations. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the LTC3606B control loop does not depend on the output capacitors esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. however, care must be taken when ceramic capacitors are used at the input. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in , large enough to damage the part. for more information, see application note 88. when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
LTC3606B 13 3606bf applications information setting the output voltage the LTC3606B regulates the v fb pin to 0.6v during regulation. thus, the output voltage is set by a resistive divider, figure 2, according to the following formula: v out = 0.6v 1 + r2 r1 ? ? ? ? ? ? (2) keeping the current small (< 10a) in these resistors maximizes ef? ciency, but making it too small may allow stray capacitance to cause noise problems or reduce the phase margin of the error amp loop. to improve the frequency response of the main control loop, a feedback capacitor (c f ) may also be used. great care should be taken to route the v fb line away from noise sources, such as the inductor or the sw line. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load ? esr, where esr is the effective series resistance of c out . i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/dc ratio cannot be used to determine the phase margin. in addition, feedback capacitors (c f ) can be added to improve the high frequency response, as shown in figure 2. capacitor c f provides phase lead by creating a high frequency zero with r2 which improves the phase margin. the output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. for a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to application note 76. in some applications, a more severe transient can be caused by switching in loads with large (>1f) input capacitors. the discharged input capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. the solution is to limit the turn-on speed of the load switch driver. a hot swap? controller is designed speci? cally for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting. ef? ciency considerations the percent ef? ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef? ciency and which change would produce the most improvement. percent ef? ciency can be expressed as: % ef? ciency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc., are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, four sources usually account for the losses in LTC3606B circuits: 1) v in quiescent current, 2) switching losses, 3) i 2 r losses, 4) other system losses. 1. the v in current is the dc supply current given in the electrical characteristics which excludes mosfet driver and control currents. v in current results in a small (<0.1%) loss that increases with v in , even at no load. hot swap is a trademark of linear technology corporation
LTC3606B 14 3606bf applications information 2. the switching current is the sum of the mosfet driver and control currents. the mosfet driver current results from switching the gate capacitance of the power mosfets. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from v in to ground. the resulting dq/dt is a current out of v in that is typically much larger than the dc bias current. in continuous mode, i gatechg = f o (q t + q b ), where q t and q b are the gate charges of the internal top and bottom mosfet switches. the gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. 3. i 2 r losses are calculated from the dc resistances of the internal switches, r sw , and external inductor, r l . in continuous mode, the average output current ? ows through inductor l, but is chopped between the internal top and bottom switches. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top ) ? (dc) + (r ds(on)bot ) ? (1C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteristics curves. thus, to obtain i 2 r losses: i 2 r losses = i out 2 ? (r sw + r l ) 4. other hidden losses, such as copper trace and internal battery resistances, can account for additional ef? ciency degradations in portable systems. it is very important to include these system level losses in the design of a system. the internal battery and fuse resistance losses can be minimized by making sure that c in has adequate charge storage and very low esr at the switching frequency. other losses, including diode conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss. thermal considerations in a majority of applications, the LTC3606B does not dissipate much heat due to its high ef? ciency. in the unlikely event that the junction temperature somehow reaches approximately 150c, both power switches will be turned off and the sw node will become high impedance. the goal of the following thermal analysis is to determine whether the power dissipated causes enough temperature rise to exceed the maximum junction temperature (125c) of the part. the temperature rise is given by: t rise = p d ? ja where p d is the power dissipated by the regulator and ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature, t j , is given by: t j = t rise + t ambient as a worst-case example, consider the case when the LTC3606B is in dropout at an input voltage of 2.7v with a load current of 800ma and an ambient temperature of 70c. from the typical performance characteristics graph of switch resistance, the r ds(on) of the switch is 0.33. therefore, the power dissipated is: p d = i out 2 ? r ds(on) = 212mv given that the thermal resistance of a properly soldered dfn package is approximately 40c/w, the junction temperature of an LTC3606B device operating in a 70c ambient temperature is approximately: t j = (0.212w ? 40c/w) + 70c = 78.5c which is well below the absolute maximum junction temperature of 125c.
LTC3606B 15 3606bf figure 3a. LTC3606B layout diagram (see board layout checklist) applications information c f r lim r pgd v in 2.5v to 5.5v v out 3606b f03a r1 l1 r2 c in c out bold lines indicate high current paths c lim v in LTC3606B sw v fb gnd rlim run pgood pc board layout considerations when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3606B. these items are also illustrated graphically in the layout diagrams of figures 3a and 3b. check the following in your layout: 1. does the capacitor c in connect to the power v in (pin 5) and gnd (pin 9) as closely as possible? this capacitor provides the ac current of the internal power mosfets and their drivers. 2. are the respective c out and l closely connected? the (C) plate of c out returns current to gnd and the (C) plate of c in . 3. the resistor divider, r1 and r2, must be connected between the (+) plate of c out and a ground sense line terminated near gnd (pin 9). the feedback signal v fb should be routed away from noisy components and traces, such as the sw line (pin 4), and their trace length should be minimized. 4. keep sensitive components away from the sw pin, if possible. the input capacitor c in , c lim and the resistors r1, r2, and r lim should be routed away from the sw traces and the inductors. 5. a ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the gnd pin at a single point. these ground traces should not share the high current path of c in or c out . 6. flood all unused areas on all layers with copper. flooding with copper will reduce the temperature rise of power components. these copper areas should be connected to v in or gnd.
LTC3606B 16 3606bf applications information figure 3b. LTC3606B suggested layout sw gnd gnd rlim gnd sw v fb run pgood v in gnd v out v in via to v out sense
LTC3606B 17 3606bf design example as a design example, consider using the LTC3606B in a usb-gsm application, with v in = 5v, i inmax = 500ma, with the output charging a supercap of 4.4mf. the load requires 800ma in active mode and 1ma in standby mode. the output voltage v out = 3.4v. first, calculate the inductor value for about 40% ripple current (320ma in this example) at maximum v in . using a derivation of equation (1): l1 = 3.4v 2.25mhz ? (320ma) ?1 ? 3.4v 5v ? ? ? ? ? ? = 1.51h for the inductor, use the closest standard value of 1.5h. the 4.4mf supercaps are used to deliver the required 2a pulses to power the rf power ampli? ers, while the LTC3606B recharges the supercap after the pulse ends, see figure 4c. as for the input capacitor, a typical value figure 4a. design example circuit v in usb input 5v l1 1.5h r2 280k r1 59k c in 10f c in : avx 08056d106kat2a c out : vishay 592d228x96r3x2t20h + v out 3.4v at 800ma i lim = 475ma r lim 116k c lim 2200pf r pgd 499k c out 2.2mf s 2 supercap pgood l1: coilcraft lps4012-152ml v in run LTC3606B v fb sw pgood gnd rlim 3606b f04 applications information of c in = 10f should suf? ce, if the source impedance is very low. the feedback resistors program the output voltage. to maintain high ef? ciency at light loads, the current in these resistors should be kept small. choosing 10a with the 0.6v feedback voltage makes r1~60k. a close standard 1% resistor is 59k. using equation (2). r2 = v out 0.6 ? 1 ? ? ? ? ? ? ?r1 = 276k, 280k for 1% a feedforward capacitor is not used since the 4.4mf supercap will inhibit any fast output voltage transients. figure 4 shows the complete schematic for this example, along with the ef? ciency curve and transient response. input current limit is set at 475ma average current, r lim = 116k, c lim = 2200pf. see programming input current limit section for selecting r lim and selection of c lim capacitance section for c lim .
LTC3606B 18 3606bf applications information figure 4b. ef? ciency vs output current figure 4c. transient response power loss (w) 10 1 0.1 0.01 0.001 output current (a) efficiency (%) 3606b f04b 100 90 80 70 60 50 40 30 20 10 0 0.0001 0.1 1 0.01 0.001 v out = 3.4v v in = 3.6v v in = 4.2v v in = 5v 1ms/div v in = 5v, 500ma compliant r lim = 116k, c lim = 2200pf i load = 0a to 2a, c out = 4.4mf, v out = 3.4v i lim = 475ma 3606b f04c v in 1v/div ac-coupled v out 200mv/div i in 500ma/div i out 500ma/div
LTC3606B 19 3606bf information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) 3.00 p 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 p 0.10 bottom viewexposed pad 1.65 p 0.10 (2 sides) 0.75 p 0.05 r = 0.125 typ 2.38 p 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd8) dfn 0509 rev c 0.25 p 0.05 2.38 p 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 p 0.05 (2 sides) 2.10 p 0.05 0.50 bsc 0.70 p 0.05 3.5 p 0.05 package outline 0.25 p 0.05 0.50 bsc
LTC3606B 20 3606bf linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 1009 ? printed in usa related parts typical applications 800ma buck converter, i lim = 500ma 800ma buck converter, i lim = 475ma or disabled pgood v in usb input 5v v out 3.4v at 800ma 3606b ta0 2 c out 2.2mf s 2 supercap c in 10f r pgd 499k c in : avx 08056d106kat2a c out : vishay 592d228x96r3x2t20h l1: coilcraft lps4012-152ml r lim 110k c lim 1000pf l1 1.5h r2 1210k r1 255k v in LTC3606B sw v fb gnd rlim run pgood + pgood v in usb input 5v v out 3.4v at 800ma 3606b ta02 c out 2.2mf s 2 supercap c in 10f r pgd 499k c in : avx 08056d106kat2a c out : vishay 592d228x96r3x2t20h l1: coilcraft lps4012-152ml c lim 2200pf i lim disable r lim 116k l1 1.5h r2 1210k r1 255k v in LTC3606B sw v fb gnd rlim run pgood + part number description comments ltc3619/ltc3619b dual 400ma and 800ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 50a, i sd < 1a, ms10e, 3mm 3mm dfn-10 ltc3127 1.2a i out , 1.6mhz, synchronous buck-boost dc/dc converter with adjustable input current limit 94% ef? ciency, v in(min) = 1.8v, v in(max) = 5.5v, v out(max) = 5.25v, i q = 18a, i sd < 1a, 3mm 3mm dfn-msop10e ltc3125 1.2a i out , 1.6mhz, synchronous boost dc/dc converter with adjustable input current limit 94% ef? ciency, v in(min) = 1.8v, v in(max) = 5.5v, v out(max) = 5.25v, i q = 15a, i sd < 1a, 2mm 3mm dfn-8 ltc3417a/ ltc3417a-2 dual 1.5a/1a, 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.3v, v in(max) = 5.5v, v out(min) = 0.8v, i q = 125a, i sd = <1a, tssop-16e, 3mm 5mm dfn-16 ltc3407a/ ltc3407a-2 dual 600ma/600ma, 1.5mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 40a, i sd = <1a, ms10e, 3mm 3mm dfn-10 ltc3548/ltc3548-1/ ltc3548-2 dual 400ma and 800ma i out , 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.5v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 40a, i sd = <1a, ms10e, 3mm 3mm dfn-10 ltc3546 dual 3a/1a, 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in(min) = 2.3v, v in(max) = 5.5v, v out(min) = 0.6v, i q = 160a, i sd = <1a, 4mm 5mm qfn-28

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